Memory Address Decoding
If a memory failure occurs during POST, and the Diag/Norm switch is in the
Diag position, the U-number and the physical address of the failing SIMM are
output to the serial port.
Use address Bits 28, 29, 30, and 31 of the physical address to isolate the board
the failing SIMM is located on.
| ADDRESS BITS |
BANK
| BOARD |
| 0xxxxxxx |
0 |
CPU |
| 1xxxxxxx |
1 |
CPU |
| 2xxxxxxx |
2 |
CPU |
| 3xxxxxxx |
3 |
CPU |
| 4xxxxxxx |
0 |
Memory 1 |
| 5xxxxxxx |
1 |
Memory 1 |
| 6xxxxxxx |
2 |
Memory 1 |
| 7xxxxxxx |
3 |
Memory 1 |
| 8xxxxxxx |
0 |
Memory 2 |
| 9xxxxxxx |
1 |
Memory 2 |
| axxxxxxx |
2 |
Memory 2 |
| bxxxxxxx |
3 |
Memory 2 |
Use address Bits 0, 1, and 2 of the physical address to isolate the failing
byte. Use address Bit 3 to determine if the failing SIMM is the Low or High SIMM
within the bank.
| ADDRESS BITS |
BYTE |
BITS |
LOW/HIGH SIMM |
| xxxxxxx7 |
0 |
0 - 7 |
Low |
| xxxxxxxf |
0 |
0 - 7 |
High |
| xxxxxxx6 |
1 |
8 - 15 |
Low |
| xxxxxxxe |
1 |
8 - 15 |
High |
| xxxxxxx5 |
2 |
16 - 24 |
Low |
| xxxxxxxd |
2 |
16 - 24 |
High |
| xxxxxxx4 |
3 |
25 - 31 |
Low |
| xxxxxxxc |
3 |
25 - 31 |
High |
| xxxxxxx3 |
4 |
32 - 39 |
Low |
| xxxxxxxb |
4 |
32 - 39 |
High |
| xxxxxxx2 |
5 |
40 - 47 |
Low |
| xxxxxxxa |
5 |
40 - 47 |
High |
| xxxxxxx1 |
6 |
48 - 55 |
Low |
| xxxxxxx9 |
6 |
48 - 55 |
High |
| xxxxxxx0 |
7 |
56 - 63 |
Low |
| xxxxxxx8 |
7 |
56 - 63 |
High |
|
