Table of Contents
Overview of the
LightStream 1010 PAMs
This chapter briefly describes the port adapter modules (PAMs) for the LightStream 1010 ATM switch. PAMs provide ports for connection to network services.You can install up to two PAM cards in a carrier module (CM) in slot 0, slot 1, slot 3, or slot 4 of a
LightStream 1010 switch chassis. Slot 2 is reserved for the ATM Switch Processor (ASP) card. Figure 1-1 shows a PAM.
Figure 1-1: Typical LightStream 1010 PAM
All configuration information for PAMs is saved between hot swaps and switch reboots, while interface types are discovered automatically by the switch. This eliminates mandatory manual configuration.
The LightStream 1010 supports the following six PAM combinations:
- 155-Mbps PAM
- 622-Mbps PAM
- DS-3/E3 PAM
- T1/E1 PAM
- CES PAM
- 25-Mbps PAM
The 155-Mbps Synchronous Optical Network (SONET) STS3C/SDH STM1 PAM is used for intercampus or wide-area links. The four ports on the PAM can be configured as redundant links using the switch routing protocols. The 155-Mbps PAM supports SC-type and unshielded twisted-pair (UTP) connectors. Receive and transmit LEDs on each port give quick, visual indications of port status and operation.
The 155-Mbps PAMs provide the following:
- Four 155.52-Mbps ports
- STS-3/STM1/ATM Forum-compliant framer chip
- Optical transceiver containing permanent logical link (PLL) on the receive side
- Line status indication on the front panel
- Clocks distributed from the ASP
- Network clock selectable from any port to the ASP
- ID programmable read-only memory (PROM) for board identification
- Mixed 155-Mbps PAM has port 0 as a single-mode (IR+) type, and ports 1 to 3 are multimode ports
- IR ---Intermediate Reach.
- IR+--- Intermediate Reach Plus. Ranges and dispersion based on the SONET IR specification. Output power and Receiver sensitivity are increased to accommodate a longer reach through a larger fiber power budget.
- Connections
- 32,000 point-to-point
- 1985 point-to-multipoint
- Virtual circuit (VC) and virtual path (VP) switching, VP tunneling, 8 bits of virtual path identifier (VPI), up to 14 bits of virtual channel identifier (VCI)
- Permanent virtual circuit (PVC) and switched virtual circuit (SVC)
- F4 and F5 Operation, Administration, and Maintenance (OAM) segment and end-to-end flows, remote defect identification (RDI) and alarm indication signal (AIS)
The 622-Mbps SONET STS12/SDH STM4 PAM is used for intercampus or wide-area links. The single port on the PAM can be configured as a redundant link using the switch routing protocols. The PAM supports an SC-type connector. Receive and transmit LEDs give quick, visual indications of port status and operation.
The 622-Mbps PAMs provide the following:
- One 622-Mbps port
- STS-12C/STM4/ATM Forum-compliant framer chip
- Optical transceiver containing PLL on the receive side
- Line status indication on the front panel
- Network clock selectable from any port to the ASP
- Interface features:
- Debugging---multiple levels of port loopback
- Configurable for SONET or SDH framing
- Connector: SC
- Connections:
- 32,000 point-to-point
- 1985 point-to-multipoint
- VC and VP switching, VP tunneling, 8 bits of VPI, up to 14 bits of VCI
- PVC and SVC
- F4 and F5 OAM segment and end-to-end flows, RDI and AIS
- OAM packet Internet grouper (ping) on IP or ATM address
- Signaling:
- User-Network Interface (UNI) 3.0, UNI 3.1, and 4.0
- Interim Local Management Interface (ILMI)
- Redundant link support with load balancing or best-fit selection
- Traffic management:
- Single, dual-mode leaky bucket usage parameter control (traffic policing)
- Per-port traffic pacing
- Configurable multiple and per-port connection switch thresholds
- Multiple, configurable per-connection, port, and switch thresholds
- Multiple priority classes
- All ATM connection types and ATM adaptation layers (AALs)
The DS-3 PAM and the E3 PAMs are used for wide-area connectivity, to link multiple campuses, or to connect to public networks. The ports on the PAM can be set up as redundant links.
The DS-3 and E3 PAMs provide the following:
- Two or four 45-Mbps (DS-3) or 34-Mbps (E3) ports
- Line status indication on the front panel
- Clocks distributed from the ASP (quad DS-3/E3 PAMs only)
- Network clock selectable from any port to the ASP and to provide transmit clocking for other PAMs (quad DS-3/E3 PAMs only)
Note Network clocking is supported on the quad (4-port) DS-3/E3 PAMs only.
- ID PROM for board identification
- Interface features
- Debugging---Multiple levels of port loopback
- Both cell-streaming mode and PLCP framing support
- Connectors: BNC
- Signaling
- UNI 3.0, UNI 3.1 in future release
- ILMI
- Redundant link support with load balancing or best-fit selection
- Traffic Management
- Single, dual-mode leaky bucket usage parameter control (traffic policing)
- Per-port traffic pacing
- Multiple, configurable per connection, port and switch thresholds
- Multiple priority classes
The T1 and E1 trunk PAMs are ideal for intercampus or wide-area links. The four ports on the PAM can be configured as redundant links using the switch routing protocols. The PAM supports UTP and BNC connectors and receive; transmit LEDs on each port give quick, visual indications of port status and operation.
The T1 and E1 trunk PAMs provide the following:
- Four T1 (1.544 Mbps) or E1 (2.048 Mbps) ports
- Transceiver containing PLL on the transmit and receive sides
- Line status indication on the front panel
- ID PROM for board identification
The circuit emulation service (CES) T1 and E1 PAMs are used for links that require constant bit rate (CBR) services such as interconnecting PBXs, time-division multiplexers, and video conference equipment over campus, public, or private networks. The four ports on the PAM can be configured as redundant links using the switch's routing protocols. The T1 PAMs support UTP connectors and the E1 PAMs support either twisted-pair, STP, or 75-ohm BNC connectors. Status and carrier detect LEDs on each port give quick, visual indications of port status and operation.
The CES T1 and E1 PAMs provide the following:
- 4-port T1 or E1 CBR PAM
- Structured and unstructured CBR processing
- Adaptive, Synchronous Residual Time Stamp (SRTS), and synchronous clocking for CBR traffic
- Clear channel and channelized with CAS signaling on CBR ports
- Online insertion and removal
- Clear channel circuit emulation
- IOS command-line interface (CLI)
- Global network clock synchronization (Nettime)
- Dynamic ATM addressing for CBR channel-groups
The 25-Mbps PAM has 12 25.6-Mbps ATM ports. Each port is compliant with the ATM Forum PHY standard for 25.6 Mbps over twisted pair cable and is ideal for workgroup links. Any of the 12 ports can be configured as redundant links using the switch's routing protocols. The PAM has a 96-pin Molex connector and a multileg 12 RJ-45 cable assembly.
The 25-Mbps PAMs provide the following:
- Support for 12 ATM UNI ports at standard throughput rate of 25.6 Mbps full duplex
- Compatible with ATM Forum 25.6-Mbps PHY specification for UTP-3, UTP-5, or STP-5 except that the RJ-45 connector is replaced with a Molex 96-pin female connector (a cable assembly with 12 RJ-45 standard connectors is provided with the PAM)
- A CPU bus interface for control and monitoring of the board ID EEPROM and LEDs
- Priority queueing (four levels) at each transmit (TX) output port
- Buffer memory for transmit and receive (RX) cells and for each group of six ports; 128K by 16-bit local external SRAM for flexible queueing of 4,092 cells in transmit data path (the minimum queue allocations are selectable for each transmit queue priority from 4 to 60 cells, in multiples of 4, via software control)
- Support for multicasting to any combination of 12 transmit ports
- Individual enabling for TX and RX of each port separately
- Individual loopback control in each PMD device on board, via software control
- Three 24-bit statistics counters per port for receive discarded cells, plus received and transmitted cells
- Per-port and per-condition maskable interrupt to the CPU in case of physical or line error conditions
Posted: Tue Jun 22 13:23:57 PDT 1999
Copyright 1989-1999©Cisco Systems Inc.
